Each mainboard has a set of wires running across it that interconnect all the devices and chips that are plugged into it. These wires are collectively called the 'bus'. The number of wires in the bus determines how 'wide' the bus is.

The data Bus contains either 8, 16, 32, 64, 128 or more wires. Most home computer systems are 32 or 64 wires. In addition to the data wires, there is one or more additional wires used for signalling and control. Let me give you an example. In order for the CPU to talk to the RAM and store a piece of data, the CPU must transmit data across the bus to the RAM. It does so by taking control of the bus, using an interrupt signal, and then sends the data over the bus to the RAM's system address.

Bus Throughput

To get the total throughput capability of the bus, multiply the bus clock speed in hertz times the number of bits 'wide' the bus is. Data Busses are almost always a multiple of 8 bits wide (8, 16, 32, 64 etc.)

For instance:

33 mhz x 32 bits = 1,056 mbps/sec

200 mhz x 64 bits = 12,800 mbps/sec (12.8 gbps)

Bus Arbitration

Whenever a device needs to communicate with another device connected to the mainboard it must do so over the bus. Because the bus is shared amongst all the devices, a method for deciding which device gets to use the bus must be used.The method used to determine who gets access to the bus and when is referred to as bus arbitration. The bus arbitration mechanism is designed so that high priority devices like the processor and RAM get first access to the bus, while other devices (disks, video cards, sound cards etc.) get lower priority, and often have to wait to access the bus. Usually this prioritization is accomplished by assigning lower numbered interrupts to higher priority systems. On many systems, the CPU has interrupt 0. and always goes first. Also, there are time slices provided over the bus.

Interrupts (IRQ's)

This control channel is used for signalling 'interrupts'. An interupt signal is used to 'interrupt' the CPU from it's normal tasks so that whatever event occurred can be properly handled immediately. For example, when a key on the keyboard is pressed, this causes the keyboard to request access to the bus. This event is called an 'interrupt request'. The CPU handles interrupt requests according to the device's priority (interrupt number). The lower the interrupt number, the higher priority the device. These interrupts are often referred to in Hexidecimal values.

Direct Memory Access (DMA)

Bus arbitration schemes have gotten so advanced that the main CPU of the computer is no longer required to arbitrate the BUS as used to be the case in the distant past. Devices may now directly insert or retrieve data from/to memory (the RAM). This makes the devices operate much more quickly. On clock cycles where the processor does not use the bus, other devices may use the bus to access the RAM.

Bus Types

System Buses (older systems, most are obsolete)

  • Industry Standard Architecture (ISA)
    8/16-bit bus used in IBM compatibles - Still in use
  • Micro Channel Architecture (MCA)
    16/32 bit bus architecture used in IBM machines
  • Extended Industry Standard Architecture (EISA)
    Compaq's competing standard to the MCA bus, but never got off the ground.

Local Buses

  • Video Electronics Standards Association local bus (VESA Local Bus) [obsolete ]
    Developed to produce better interface to video systems by tying some of the adaptor slots to the higher CPU bus.
  • Peripheral Component Interconnect Local Bus (PCI Local Bus) - Most widely used
    16 and 32 bit versions, 1993 released. Bypasses the main CPU bus to allow the CPU to fully utilize the bus. Devices contact a bus arbitration chip to gain access to the PCI bus.
  • PC-Card (PCMCIA)
    Used primarilly in portable computers. Bus is hot-swappable, and like PCI, bypasses the mainboard's bus to allow the processor to fully utilize the existing system bus.

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